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SPAA
2006
ACM
14 years 1 months ago
Modeling instruction placement on a spatial architecture
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...
Martha Mercaldi, Steven Swanson, Andrew Petersen, ...
CAMP
2005
IEEE
14 years 1 months ago
Parallel Extraction Architecture for Image Moments of Numerous Objects
— In this paper, we propose a new architecture that can extract information of numerous objects in an image at highspeed. Various characteristics can be obtained from the image m...
Yoshihiro Watanabe, Takashi Komuro, Shingo Kagami,...
TPDS
2002
117views more  TPDS 2002»
13 years 7 months ago
Gemini: An Optical Interconnection Network for Parallel Processing
Abstract--The Gemini interconnect is a dual technology (optical and electrical) interconnection network designed for use in tightlycoupled multicomputer systems. It consists of a c...
Roger D. Chamberlain, Mark A. Franklin, Ch'ng Shi ...
NETWORK
2007
100views more  NETWORK 2007»
13 years 7 months ago
Parallel Programmable Ethernet Controllers: Performance and Security
Programmable network interfaces can provide network servers with a flexible interface to high-bandwidth Ethernet links, but they face critical software and architectural challenge...
Derek L. Schuff, Vijay S. Pai, Paul Willmann, Scot...
SBACPAD
2008
IEEE
206views Hardware» more  SBACPAD 2008»
14 years 2 months ago
A High Performance Massively Parallel Approach for Real Time Deformable Body Physics Simulation
Single processor technology has been evolving across last decades, but due to physical limitations of chip manufacturing process, the industry is pursuing alternatives to sustain ...
Thiago S. M. C. de Farias, Mozart W. S. Almeida, J...