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IPPS
2005
IEEE
14 years 1 months ago
A Compiler Method for Memory-Conscious Mapping of Applications on Coarse-Grained Reconfigurable Architectures
This paper presents a compiler methodology for memoryaware mapping on 2-Dimensional coarse-grained reconfigurable architectures that aims in improving the mapped applications’ p...
Grigoris Dimitroulakos, Michalis D. Galanis, Costa...
WDAS
2000
13 years 9 months ago
Scalable Distributed Data Structures for High-Performance Databases
Present databases, whether on centralized or parallel DBMSs, do not deal well with scalability. We present an architecture for Wintel multicomputers termed AMOS-SDDS, coupling a h...
Yakham Ndiaye, Aly Wane Diene, Witold Litwin, Tore...
HPDC
2010
IEEE
13 years 8 months ago
Toward high performance computing in unconventional computing environments
Parallel computing on volatile distributed resources requires schedulers that consider job and resource characteristics. We study unconventional computing environments containing ...
Brent Rood, Nathan Gnanasambandam, Michael J. Lewi...
ICPADS
2002
IEEE
14 years 24 days ago
Communication Pattern Based Methodology for Performance Analysis of Termination Detection Schemes
Efficient determination of processing termination at barrier synchronization points can occupy an important role in the overall throughput of parallel and distributed computing sy...
Yili Tseng, Ronald F. DeMara
ICPP
2007
IEEE
14 years 2 months ago
Architectural Challenges in Memory-Intensive, Real-Time Image Forming
The real-time image forming in future, high-end synthetic aperture radar systems is an example of an application that puts new demands on computer architectures. The initial quest...
Anders Ahlander, H. Hellsten, K. Lind, J. Lindgren...