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CAP
2010
13 years 2 months ago
Parallel arithmetic encryption for high-bandwidth communications on multicore/GPGPU platforms
In this work we study the feasibility of high-bandwidth, secure communications on generic machines equipped with the latest CPUs and General-Purpose Graphical Processing Units (GP...
Ludovic Jacquin, Vincent Roca, Jean-Louis Roch, Mo...
IPPS
2010
IEEE
13 years 5 months ago
Tile QR factorization with parallel panel processing for multicore architectures
To exploit the potential of multicore architectures, recent dense linear algebra libraries have used tile algorithms, which consist in scheduling a Directed Acyclic Graph (DAG) of...
Bilel Hadri, Hatem Ltaief, Emmanuel Agullo, Jack D...
IEEEPACT
2000
IEEE
14 years 3 days ago
Exploring the Limits of Sub-Word Level Parallelism
Multimedia instruction set extensions have become a prominent feature in desktop microprocessor platforms, promising superior performance on a wide range of floating-point and int...
Kevin Scott, Jack W. Davidson
ICSE
2004
IEEE-ACM
14 years 7 months ago
A Hybrid Architectural Style for Distributed Parallel Processing of Generic Data Streams
Immersive, interactive applications grouped under the concept of Immersipresence require on-line processing and mixing of multimedia data streams and structures. One critical issu...
Alexandre R. J. François
CONPAR
1994
13 years 11 months ago
The Rewrite Rule Machine Node Architecture and Its Performance
The Rewrite Rule Machine (RRM) is a massively parallel MIMD/SIMD computer designed with the explicit purpose of supporting veryhigh-level parallel programming with rewrite rules. T...
Patrick Lincoln, José Meseguer, Livio Ricci...