Sciweavers

4880 search results - page 935 / 976
» Mechanism Design by Creditability
Sort
View
ISCA
1995
IEEE
109views Hardware» more  ISCA 1995»
14 years 21 days ago
Next Cache Line and Set Prediction
Accurate instruction fetch and branch prediction is increasingly important on today’s wide-issue architectures. Fetch prediction is the process of determining the next instructi...
Brad Calder, Dirk Grunwald
ISCA
1995
IEEE
98views Hardware» more  ISCA 1995»
14 years 21 days ago
Instruction Fetching: Coping with Code Bloat
Previous research has shown that the SPEC benchmarks achieve low miss ratios in relatively small instruction caches. This paper presents evidence that current software-development...
Richard Uhlig, David Nagle, Trevor N. Mudge, Stuar...
SIGGRAPH
1991
ACM
14 years 20 days ago
An object-oriented framework for the integration of interactive animation techniques
We present an interactive modeling and animation system that facilitates the integration of a variety of simulation and animation paradigms. This system permits the modeling of di...
Robert C. Zeleznik, D. Brookshire Conner, Matthias...
HT
1987
ACM
14 years 19 days ago
Exploring Representation Problems Using Hypertext
Hypertext is a technology well-suited to exploring different kinds of representational problems. It can be used first as an informal mechanism to describe the attributes of object...
Catherine C. Marshall
CASES
2009
ACM
14 years 14 days ago
A fault tolerant cache architecture for sub 500mV operation: resizable data composer cache (RDC-cache)
In this paper we introduce Resizable Data Composer-Cache (RDC-Cache). This novel cache architecture operates correctly at sub 500 mV in 65 nm technology tolerating large number of...
Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, F...