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» Mechanisms for store-wait-free multiprocessors
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ICS
1993
Tsinghua U.
13 years 11 months ago
Anatomy of a Message in the Alewife Multiprocessor
Shared-memory provides a uniform and attractive mechanism for communication. For efficiency, it is often implemented with a layer of interpretive hardware on top of a message-pas...
John Kubiatowicz, Anant Agarwal
EUROPAR
2010
Springer
13 years 7 months ago
Power-Efficient Spilling Techniques for Chip Multiprocessors
Abstract. Current trends in CMPs indicate that the core count will increase in the near future. One of the main performance limiters of these forthcoming microarchitectures is the ...
Enric Herrero, José González, Ramon ...
JSA
2000
90views more  JSA 2000»
13 years 6 months ago
An efficient implementation of tree-based multicast routing for distributed shared-memory multiprocessors
This paper presents an efficient routing and flow control mechanism to implement multidestination message passing in wormhole networks.It is targeted to situations where the size ...
Manuel P. Malumbres, José Duato
ICS
1998
Tsinghua U.
13 years 11 months ago
OPTNET: A Cost-effective Optical Network for Multiprocessors
In this paper we propose the OPTNET, a novel optical network and associated coherence protocol for scalable multiprocessors. The network divides its channels into broadcast and po...
Enrique V. Carrera, Ricardo Bianchini
CIIA
2009
13 years 8 months ago
Software Platform based Embedded Multiprocessor SoC Prototyping
This paper describes our experience in processor/threads synchronization using the POSIX API standard for MPSoC virtual applications prototyping. Spin-Lock (Binary Semaphore) imple...
Benaoumeur Senouci, Ali El Moussaoui, Bernard Goos...