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TVLSI
2008
187views more  TVLSI 2008»
13 years 7 months ago
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Che...
CN
2004
109views more  CN 2004»
13 years 7 months ago
Architectures and protocols for mobile computing applications: a reconfigurable approach
This work deals with reconfigurable control functions and protocols for supporting mobile computing applications in heterogeneous wireless systems like cellular networks and WLANs...
Carla-Fabiana Chiasserini, Francesca Cuomo, Leonar...
MSS
1999
IEEE
150views Hardware» more  MSS 1999»
13 years 11 months ago
Performance Benchmark Results for Automated Tape Library High Retrieval Rate Applications - Digital Check Image Retrievals
Benchmark tests have been designed and conducted for the purpose of evaluating the use of automated tape libraries in on-line digital check image retrieval applications. This type...
John Gniewek, George Davidson, Bowen Caldwell
HPCA
1998
IEEE
13 years 11 months ago
Address Translation Mechanisms In Network Interfaces
Good network hardware performance is often squandered by overheads for accessing the network interface (NI) within a host. NIs that support user-level messaging avoid frequent ope...
Ioannis Schoinas, Mark D. Hill
PARA
1998
Springer
13 years 11 months ago
Technologies for Teracomputing: A European Option
Abstract. Ahardware and software environment with performance above 1 Tera ops (teracomputing) is presently required to face the leading computational challenges not only in fundam...
Agostino Mathis