98 search results - page 7 / 20 » Memory Access Scheduling Schemes for Systems with Multi-Core... |
RTSS
2007
IEEE
14 years 1 months ago
2007
IEEE
In multiprocessor systems, the traffic on the bus does not solely originate from data transfers due to data dependencies between tasks, but is also affected by memory transfers a...
HPDC
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper describes a novel approach to generate an optimized schedule to run threads on distributed shared memory (DSM) systems. The approach relies upon a binary instrumentatio...
SC
2004
ACM
14 years 23 days ago
2004
ACM
In this paper, we introduce a profile-driven online page migration scheme and investigate its impact on the performance of multithreaded applications. We use lightweight, inexpens...
ICC
2007
IEEE
14 years 1 months ago
2007
IEEE
— Sharing of 3G network infrastructure among operators offers an alternative solution to reducing the investment in the coverage phase of WCDMA. For radio access network (RAN) sh...
DAC
2000
ACM
14 years 8 months ago
2000
ACM
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...