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ISCA
1991
IEEE
162views Hardware» more  ISCA 1991»
13 years 11 months ago
Comparison of Hardware and Software Cache Coherence Schemes
We use mean value analysis models to compare representative hardware and software cache coherence schemes for a large-scale shared-memory system. Our goal is to identify the workl...
Sarita V. Adve, Vikram S. Adve, Mark D. Hill, Mary...
RECOSOC
2007
116views Hardware» more  RECOSOC 2007»
13 years 9 months ago
IBC-EI: An Instruction Based Compression method with Encryption and Integrity Checking
Code Compression has been shown to be efficient in minimizing the memory requirements for embedded systems as well as in power consumption reduction and performance improvement. I...
Eduardo Wanderley Netto, Reouven Elbaz, Lionel Tor...
CF
2011
ACM
12 years 7 months ago
SIFT: a low-overhead dynamic information flow tracking architecture for SMT processors
Dynamic Information Flow Tracking (DIFT) is a powerful technique that can protect unmodified binaries from a broad range of vulnerabilities such as buffer overflow and code inj...
Meltem Ozsoy, Dmitry Ponomarev, Nael B. Abu-Ghazal...
GLOBECOM
2010
IEEE
13 years 5 months ago
Cache-Based Scalable Deep Packet Inspection with Predictive Automaton
Abstract--Regular expression (Regex) becomes the standard signature language for security and application detection. Deterministic finite automata (DFAs) are widely used to perform...
Yi Tang, Junchen Jiang, Xiaofei Wang, Yi Wang, Bin...
IPPS
2006
IEEE
14 years 1 months ago
SAMIE-LSQ: set-associative multiple-instruction entry load/store queue
The load/store queue (LSQ) is one of the most complex parts of contemporary processors. Its latency is critical for the processor performance and it is usually one of the processo...
Jaume Abella, Antonio González