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HIPEAC
2011
Springer
12 years 7 months ago
NoC-aware cache design for multithreaded execution on tiled chip multiprocessors
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
Ahmed Abousamra, Alex K. Jones, Rami G. Melhem
SIGMETRICS
2009
ACM
131views Hardware» more  SIGMETRICS 2009»
14 years 2 months ago
Modeling channel popularity dynamics in a large IPTV system
Understanding the channel popularity or content popularity is an important step in the workload characterization for modern information distribution systems (e.g., World Wide Web,...
Tongqing Qiu, Zihui Ge, Seungjoon Lee, Jia Wang, Q...
SC
1995
ACM
13 years 11 months ago
Predicting Application Behavior in Large Scale Shared-memory Multiprocessors
In this paper we present an analytical-based framework for parallel program performance prediction. The main thrust of this work is to provide a means for treating realistic appli...
Karim Harzallah, Kenneth C. Sevcik
IEEEPACT
2003
IEEE
14 years 25 days ago
Constraint Graph Analysis of Multithreaded Programs
This paper presents a framework for analyzing the performance of multithreaded programs using a model called a constraint graph. We review previous constraint graph definitions fo...
Harold W. Cain, Mikko H. Lipasti, Ravi Nair
ISPASS
2010
IEEE
14 years 2 months ago
Dynamic program analysis of Microsoft Windows applications
—Software instrumentation is a powerful and flexible technique for analyzing the dynamic behavior of programs. By inserting extra code in an application, it is possible to study...
Alex Skaletsky, Tevi Devor, Nadav Chachmon, Robert...