86 search results - page 12 / 18 » Memory access optimizations in instruction-set simulators |
ANSS
2004
IEEE
13 years 10 months ago
2004
IEEE
To enable optimizations in memory access behavior of high performance applications, cache monitoring is a crucial process. Simulation of cache hardware is needed in order to allow...
ASPLOS
1991
ACM
13 years 10 months ago
1991
ACM
Blocking is a well-known optimization technique for improving the effectiveness of memory hierarchies. Instead of operating on entire rows or columns of an array, blocked algorith...
ICS
2010
Tsinghua U.
13 years 11 months ago
2010
Tsinghua U.
We explore the intersection between an emerging class of architectures and a prominent workload: GPGPUs (General-Purpose Graphics Processing Units) and regular expression matching...
MICRO
1997
IEEE
13 years 11 months ago
1997
IEEE
As the disparity between processor and main memory performance grows, the number of execution cycles spent waiting for memory accesses to complete also increases. As a result, lat...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
With the increasing gap between processor speed and memory latency, the performance of data-dominated programs are becoming more reliant on fast data access, which can be improved...