Sciweavers

3202 search results - page 44 / 641
» Memory access scheduling
Sort
View
140
Voted
SIGSOFT
2003
ACM
16 years 3 months ago
ARCHER: using symbolic, path-sensitive analysis to detect memory access errors
Memory corruption errors lead to non-deterministic, elusive crashes. This paper describes ARCHER (ARray CHeckER) a static, effective memory access checker. ARCHER uses path-sensit...
Yichen Xie, Andy Chou, Dawson R. Engler
129
Voted
ESTIMEDIA
2007
Springer
15 years 8 months ago
Network Calculus Applied to Verification of Memory Access Performance in SoCs
SoCs for multimedia applications typically use only one port to off-chip DRAM for cost reasons. The sharing of interconnect and the off-chip DRAM port by several IP blocks makes t...
Tomas Henriksson, Pieter van der Wolf, Axel Jantsc...
JCP
2008
141views more  JCP 2008»
15 years 2 months ago
Leakage Controlled Read Stable Static Random Access Memories
Semiconductor manufacturing process scaling increases leakage and transistor variations, both of which are problematic for static random access memory (SRAM). Since SRAM is a criti...
Sayeed A. Badrudduza, Ziyan Wang, Giby Samson, Law...
139
Voted
TC
2008
15 years 2 months ago
Secure Memory Accesses on Networks-on-Chip
Security is gaining relevance in the development of embedded devices. Toward a secure system at each level of design, this paper addresses security aspects related to Network-on-Ch...
Leandro Fiorin, Gianluca Palermo, Slobodan Lukovic...
98
Voted
ACSC
2004
IEEE
15 years 6 months ago
On Improving the Memory Access Patterns During The Execution of Strassen's Matrix Multiplication Algorithm
Matrix multiplication is a basic computing operation. Whereas it is basic, it is also very expensive with a straight forward technique of O(N3 ) runtime complexity. More complex s...
Hossam A. ElGindy, George Ferizis