Sciweavers

3202 search results - page 465 / 641
» Memory access scheduling
Sort
View
ISVLSI
2003
IEEE
101views VLSI» more  ISVLSI 2003»
14 years 1 months ago
Energy Benefits of a Configurable Line Size Cache for Embedded Systems
Previous work has shown that cache line sizes impact performance differently for different desktop programs – some programs work better with small line sizes, others with larger...
Chuanjun Zhang, Frank Vahid, Walid A. Najjar
SBACPAD
2003
IEEE
75views Hardware» more  SBACPAD 2003»
14 years 1 months ago
The Limits of Speculative Trace Reuse on Deeply Pipelined Processors
Trace reuse improves the performance of processors by skipping the execution of sequences of redundant instructions. However, many reusable traces do not have all of their inputs ...
Maurício L. Pilla, Amarildo T. da Costa, Fe...
CIKM
2003
Springer
14 years 1 months ago
Speech user interfaces for information retrieval
The research proposed here concentrates on the problem of designing and developing a spoken query retrieval (SQR) system to access large document databases via voice. The main cha...
Juan E. Gilbert, Yapin Zhong
ICCS
2003
Springer
14 years 1 months ago
Design and Evaluation of Distributed Smart Disk Architecture for I/O-Intensive Workloads
Smart disks, a type of processor-embedded active I/O devices, with their on-disk memory and network interface controller, can be viewed as processing elements with attached storage...
Steve C. Chiu, Wei-keng Liao, Alok N. Choudhary
FUN
2010
Springer
247views Algorithms» more  FUN 2010»
14 years 29 days ago
A Fun Application of Compact Data Structures to Indexing Geographic Data
The way memory hierarchy has evolved in recent decades has opened new challenges in the development of indexing structures in general and spatial access methods in particular. In t...
Nieves R. Brisaboa, Miguel Rodríguez Luaces...