122 search results - page 23 / 25 » Memory models for open-nested transactions |
ISPASS
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper proposes the use of microprocessor performance counters for online measurement of complete system power consumption. While past studies have demonstrated the use of per...
POPL
2006
ACM
14 years 8 months ago
2006
ACM
The movement to multi-core processors increases the need for simpler, more robust parallel programming models. Atomic sections have been widely recognized for their ease of use. T...
LCTRTS
2010
Springer
14 years 2 months ago
2010
Springer
With increasingly more complex Multi-Processor Systems on Chip (MPSoC) and shortening time-to- market projections, Transaction Level Modeling and Platform Aware Design are seen as...
ASPLOS
2008
ACM
13 years 9 months ago
2008
ACM
The reality of multi-core hardware has made concurrent programs pervasive. Unfortunately, writing correct concurrent programs is difficult. Addressing this challenge requires adva...
C3S2E
2009
ACM
13 years 11 months ago
2009
ACM
Most database systems (DBMSs) today are operating on servers equipped with magnetic disks. In our contribution, we want to motivate the use of two emerging and striking technologi...