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» Minimal TCB Code Execution
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CASES
2010
ACM
13 years 5 months ago
Balancing memory and performance through selective flushing of software code caches
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa
CODES
2010
IEEE
13 years 5 months ago
Dynamic, non-linear cache architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, algorithm-heavy, memory-intensive applications that were originally designed and coded for generalpurpos...
Garo Bournoutian, Alex Orailoglu
ACTAC
2008
94views more  ACTAC 2008»
13 years 7 months ago
Effect Preservation in Transaction Processing in Rule Triggering Systems
Rules provide an expressive means for implementing database behavior: They cope with changes and their ramifications. Rules are commonly used for integrity enforcement, i.e., for ...
Mira Balaban, Steffen Jurk
TMC
2012
11 years 10 months ago
Secure Initialization of Multiple Constrained Wireless Devices for an Unaided User
—A number of protocols and mechanisms have been proposed to address the problem of initial secure key deployment in wireless networks. Most existing approaches work either with a...
Toni Perkovic, Mario Cagalj, Toni Mastelic, Nitesh...
22
Voted
LCTRTS
1999
Springer
13 years 11 months ago
Effective Exploitation of a Zero Overhead Loop Buffer
A Zero Overhead Loop Buffer (ZOLB) is an architectural feature that is commonly found in DSP processors. This buffer can be viewed as a compiler managed cache that contains a sequ...
Gang-Ryung Uh, Yuhong Wang, David B. Whalley, Sanj...