Background: Chow and Liu showed that the maximum likelihood tree for multivariate discrete distributions may be found using a maximum weight spanning tree algorithm, for example K...
David Edwards, Gabriel C. G. de Abreu, Rodrigo Lab...
Discrete gate sizing is a critical optimization in VLSI circuit design. Given a set of available gate sizes, discrete gate sizing problem asks to assign a size to each gate such th...
We study the influence of the choice of template in tensorbased morphometry. Using 3D brain MR images from 10 monozygotic twin pairs, we defined a tensor-based distance in the log...
Natasha Lepore, Caroline A. Brun, Yi-Yu Chou, Agat...
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky
This paper presents a technique for memory optimization for a class of computations that arises in the field of correlated electronic structure methods such as coupled cluster and...
A. Allam, J. Ramanujam, Gerald Baumgartner, P. Sad...