1222 search results - page 121 / 245 » Mistreatment-resilient distributed caching |
HPCA
1997
IEEE
14 years 1 months ago
1997
IEEE
Processors with write-through caches typically require a write buffer to hide the write latency to the next level of memory hierarchy and to reduce write traffic. A write buffer ...
ICDCS
1997
IEEE
14 years 1 months ago
1997
IEEE
This paper evaluates the use of per-node multi-threading to hide remote memory and synchronization latencies in a software DSM. As with hardware systems, multi-threading in softwa...
ICDCS
1994
IEEE
14 years 1 months ago
1994
IEEE
The Client Server DBMS model has emerged as the main paradigm in database computing. The Enhanced Client Server architecture takes advantage of all the available client resources ...
PSC
1992
14 years 1 months ago
1992
Abstract. This paper describes an implementation technique for Multilisp's future construct aimed at large shared-memory multiprocessors. The technique is a variant of lazy ta...
EUROPAR
2008
Springer
13 years 11 months ago
2008
Springer
Recent studies have showed the effectiveness of job co-scheduling in alleviating shared-cache contention on Chip Multiprocessors. Although program inputs affect cache usage and thu...