1222 search results - page 158 / 245 » Mistreatment-resilient distributed caching |
EUROPAR
2007
Springer
14 years 3 months ago
2007
Springer
Abstract. Hardware Transactional Memory (HTM) gives software developers the opportunity to write parallel programs more easily compared to any previous programming method, and yiel...
IEEEPACT
2006
IEEE
14 years 3 months ago
2006
IEEE
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
ICDCSW
2005
IEEE
14 years 2 months ago
2005
IEEE
In on-demand multi-hop routing protocols for MANETs such as DSR and AODV, a fundamental requirement for peer-to-peer connectivity is to discover routes to a remote node via flood...
IEEEPACT
2005
IEEE
14 years 2 months ago
2005
IEEE
Current high-performance computer systems are unable to saturate the latest available high-bandwidth networks such as 10 Gigabit Ethernet. A key obstacle in achieving 10 gigabits ...
IEEEPACT
2005
IEEE
14 years 2 months ago
2005
IEEE
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...