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CAV
2007
Springer
113views Hardware» more  CAV 2007»
14 years 3 months ago
On Synthesizing Controllers from Bounded-Response Properties
In this paper we propose a complete chain for synthesizing controllers from high-level specifications. From real-time properties expressed in the logic MTL we generate, under boun...
Oded Maler, Dejan Nickovic, Amir Pnueli
HYBRID
2010
Springer
13 years 7 months ago
Timed I/O automata: a complete specification theory for real-time systems
A specification theory combines notions of specifications and implementations with a satisfaction relation, a refinement relation and a set of operators supporting stepwise design...
Alexandre David, Kim G. Larsen, Axel Legay, Ulrik ...
ISSTA
2004
ACM
14 years 2 months ago
An optimizing compiler for batches of temporal logic formulas
Model checking based on validating temporal logic formulas has proven practical and effective for numerous software engineering applications. As systems based on this approach ha...
James Ezick
DFT
2008
IEEE
151views VLSI» more  DFT 2008»
13 years 10 months ago
Design and Evaluation of a Timestamp-Based Concurrent Error Detection Method (CED) in a Modern Microprocessor Controller
This paper presents a concurrent error detection technique for the control logic of a modern microprocessor. Our method is based on execution time prediction for each instruction ...
Michail Maniatakos, Naghmeh Karimi, Yiorgos Makris...
IEAAIE
2003
Springer
14 years 2 months ago
UMAS Learning Requirement for Controlling Network Resources
- This paper presents an intelligent User Manager Agent System (UMAS) in which it has a capability of making a management decision for balancing the network load with the users’ ...
Abdullah Gani, Nasser Abouzakhar, Gordon A. Manson