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MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
13 years 5 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...
IPPS
2006
IEEE
14 years 1 months ago
Analysis of checksum-based execution schemes for pipelined processors
The performance requirements for contemporary microprocessors are increasing as rapidly as their number of applications grows. By accelerating the clock, performance can be gained...
Bernhard Fechner
FCCM
2003
IEEE
148views VLSI» more  FCCM 2003»
14 years 20 days ago
A Hardware Gaussian Noise Generator for Channel Code Evaluation
Hardware simulation of channel codes offers the potential of improving code evaluation speed by orders of magnitude over workstation- or PC-based simulation. We describe a hardwar...
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y...
KDD
2000
ACM
211views Data Mining» more  KDD 2000»
13 years 11 months ago
Mining IC test data to optimize VLSI testing
We describe an application of data mining and decision analysis to the problem of die-level functional test in integrated circuit manufacturing. Integrated circuits are fabricated...
Tony Fountain, Thomas G. Dietterich, Bill Sudyka
BMCBI
2008
188views more  BMCBI 2008»
13 years 7 months ago
anNET: a tool for network-embedded thermodynamic analysis of quantitative metabolome data
Background: Compared to other omics techniques, quantitative metabolomics is still at its infancy. Complex sample preparation and analytical procedures render exact quantification...
Nicola Zamboni, Anne Kümmel, Matthias Heinema...