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TCAD
2010
102views more  TCAD 2010»
13 years 2 months ago
Functional Test Generation Using Efficient Property Clustering and Learning Techniques
Abstract--Functional verification is one of the major bottlenecks in system-on-chip design due to the combined effects of increasing complexity and lack of automated techniques for...
Mingsong Chen, Prabhat Mishra
IEICET
2006
114views more  IEICET 2006»
13 years 7 months ago
Synchronization Verification in System-Level Design with ILP Solvers
Concurrency is one of the most important issues in system-level design. Interleaving among parallel processes can cause an extremely large number of different behaviors, making de...
Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro ...
SPLC
2010
13 years 9 months ago
Consistent Product Line Configuration across File Type and Product Line Boundaries
Creating a valid software configuration of a product line can require laborious customizations involving multiple configuration file types, such as feature models, domain-specific ...
Christoph Elsner, Peter Ulbrich, Daniel Lohmann, W...
WSC
1997
13 years 9 months ago
AutoMod Tutorial
The AutoModTM simulation system differs significantly from other systems because of its ability to deal with the physical elements of a system in physical (graphical) terms and th...
Matthew W. Rohrer
POPL
2011
ACM
12 years 10 months ago
Safe nondeterminism in a deterministic-by-default parallel language
A number of deterministic parallel programming models with strong safety guarantees are emerging, but similar support for nondeterministic algorithms, such as branch and bound sea...
Robert L. Bocchino Jr., Stephen Heumann, Nima Hona...