72 search results - page 12 / 15 » Model Checking Synchronous Timing Diagrams |
WEA
2005
Springer
14 years 29 days ago
2005
Springer
Ordered Binary Decision Diagrams (OBDDs) are a data structure for Boolean functions which supports many useful operations. It finds applications in CAD, model checking, and symbol...
RTAS
2009
IEEE
14 years 2 months ago
2009
IEEE
—We define a family of execution policies for a programming model called PTIDES (Programming Temporally Integrated Distributed Embedded Systems). A PTIDES application (factory a...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
CHARME
2003
Springer
13 years 11 months ago
2003
Springer
Industrial verification teams are actively developing suitable event sequence languages for hardware verification. Such languages must be expressive, designer friendly, and hardwar...
APN
2004
Springer
14 years 27 days ago
2004
Springer
Generating the reachability set is one of the most commonly required step when analyzing the logical or stochastic behavior of a system modeled with Petri nets. Traditional “expl...