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IEICET
2006
114views more  IEICET 2006»
13 years 8 months ago
Synchronization Verification in System-Level Design with ILP Solvers
Concurrency is one of the most important issues in system-level design. Interleaving among parallel processes can cause an extremely large number of different behaviors, making de...
Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro ...
KBSE
1997
IEEE
14 years 3 days ago
NORA/HAMMR: Making Deduction-Based Software Component Retrieval Practical
Deduction-based software component retrieval uses preand postconditions as indexes and search keys and an automated theorem prover (ATP) to check whether a component matches. This...
Johann Schumann, Bernd Fischer 0002
AOSD
2009
ACM
13 years 10 months ago
Modular verification of dynamically adaptive systems
Cyber-physical systems increasingly rely on dynamically adaptive programs to respond to changes in their physical environment; examples include ecosystem monitoring and disaster r...
Ji Zhang, Heather Goldsby, Betty H. C. Cheng
CONCUR
2007
Springer
13 years 12 months ago
Temporal Antecedent Failure: Refining Vacuity
We re-examine vacuity in temporal logic model checking. We note two disturbing phenomena in recent results in this area. The first indicates that not all vacuities detected in prac...
Shoham Ben-David, Dana Fisman, Sitvanit Ruah
ATVA
2008
Springer
131views Hardware» more  ATVA 2008»
13 years 10 months ago
Computation Tree Regular Logic for Genetic Regulatory Networks
Model checking has proven to be a useful analysis technique not only for concurrent systems, but also for the genetic regulatory networks (Grns) that govern the functioning of livi...
Radu Mateescu, Pedro T. Monteiro, Estelle Dumas, H...