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» Model Checking with Multi-valued Logics
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IEEEPACT
2007
IEEE
14 years 2 months ago
Verification-Aware Microprocessor Design
The process of verifying a new microprocessor is a major problem for the computer industry. Currently, architects design processors to be fast, power-efficient, and reliable. Howe...
Anita Lungu, Daniel J. Sorin
TRUSTBUS
2007
Springer
14 years 2 months ago
The Meaning of Logs
While logging events is becoming increasingly common in computing, in communication and in collaborative environments, log systems need to satisfy increasingly challenging (if not ...
Sandro Etalle, Fabio Massacci, Artsiom Yautsiukhin
RTA
2005
Springer
14 years 1 months ago
Natural Narrowing for General Term Rewriting Systems
Abstract. For narrowing to be an efficient evaluation mechanism, several lazy narrowing strategies have been proposed, although typically for the restricted case of left-linear con...
Santiago Escobar, José Meseguer, Prasanna T...
APLAS
2007
ACM
14 years 14 days ago
The Semantics of "Semantic Patches" in Coccinelle: Program Transformation for the Working Programmer
We rationally reconstruct the core of the Coccinelle system, used for automating and documenting collateral evolutions in Linux device drivers. A denotational semantics of the syst...
Neil D. Jones, René Rydhof Hansen
FMCAD
2000
Springer
14 years 2 days ago
A Methodology for Large-Scale Hardware Verification
Abstract. We present a formal verification methodology for datapathdominated hardware. This provides a systematic but flexible framework within which to organize the activities und...
Mark Aagaard, Robert B. Jones, Thomas F. Melham, J...