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2006
IEEE
14 years 1 months ago
Temporal Logics and Model Checking for Fairly Correct Systems
We motivate and study a generic relaxation of correctness of reactive and concurrent systems with respect to a temporal specification. We define a system to be fairly correct if...
Daniele Varacca, Hagen Völzer
CAV
2004
Springer
86views Hardware» more  CAV 2004»
14 years 24 days ago
MCK: Model Checking the Logic of Knowledge
Peter Gammie, Ron van der Meyden