Sciweavers

231 search results - page 10 / 47
» Model Order Reduction for Large Scale Engineering Models Dev...
Sort
View
ASPDAC
2008
ACM
104views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Low power clock buffer planning methodology in F-D placement for large scale circuit design
Traditionally, clock network layout is performed after cell placement. Such methodology is facing a serious problem in nanometer IC designs where people tend to use huge clock buff...
Yanfeng Wang, Qiang Zhou, Yici Cai, Jiang Hu, Xian...
UML
2005
Springer
14 years 26 days ago
Enhancement of Development Technologies for Agent-Based Software Engineering
Abstract. Current trends in software development show a move towards supporting autonomous components (agents). The accurate timing of interactions between such components is growi...
Andre Karpistsenko
3DIM
2007
IEEE
14 years 1 months ago
3D laser measurement system for large scale architectures using multiple mobile robots
In order to construct three dimensional shape models of large scale architectures by a laser range finder, a number of range images are normally taken from various viewpoints and...
Ryo Kurazume, Yukihiro Tobata, Yumi Iwashita, Tsut...
ICML
2010
IEEE
13 years 8 months ago
Large Scale Max-Margin Multi-Label Classification with Priors
We propose a max-margin formulation for the multi-label classification problem where the goal is to tag a data point with a set of pre-specified labels. Given a set of L labels, a...
Bharath Hariharan, Lihi Zelnik-Manor, S. V. N. Vis...
EUROPAR
2009
Springer
14 years 1 months ago
MapReduce Programming Model for .NET-Based Cloud Computing
Recently many large scale computer systems are built in order to meet the high storage and processing demands of compute and data-intensive applications. MapReduce is one of the mo...
Chao Jin, Rajkumar Buyya