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» Model checking SystemC designs using timed automata
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IEEEPACT
2007
IEEE
14 years 1 months ago
Verification-Aware Microprocessor Design
The process of verifying a new microprocessor is a major problem for the computer industry. Currently, architects design processors to be fast, power-efficient, and reliable. Howe...
Anita Lungu, Daniel J. Sorin
ASYNC
1997
IEEE
140views Hardware» more  ASYNC 1997»
13 years 10 months ago
The Design and Verification of A High-Performance Low-Control-Overhead Asynchronous Differential Equation Solver
Abstract-This paper describes the design and verification of a high-performance asynchronous differential equation solver benchmark circuit. The design has low control overhead whi...
Kenneth Y. Yun, Ayoob E. Dooply, Julio Arceo, Pete...
SAC
2010
ACM
13 years 7 months ago
Data-aware design and verification of service compositions with Reo and mCRL2
Service-based systems can be modeled as stand-alone services coordinated by external connectors. Reo is a channelbased coordination language with well-defined semantics that enabl...
Natallia Kokash, Christian Krause, Erik P. de Vink
ECOOP
2006
Springer
13 years 8 months ago
Scoped Types and Aspects for Real-Time Java
Real-time systems are notoriously difficult to design and implement, and, as many real-time problems are safety-critical, their solutions must be reliable as well as efficient and ...
Chris Andreae, Yvonne Coady, Celina Gibbs, James N...
EMSOFT
2008
Springer
13 years 8 months ago
Automatically transforming and relating Uppaal models of embedded systems
Relations between models are important for effective automatic validation, for comparing implementations with specifications, and for increased understanding of embedded systems d...
Timothy Bourke, Arcot Sowmya