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ISCA
1999
IEEE
187views Hardware» more  ISCA 1999»
14 years 1 months ago
Area Efficient Architectures for Information Integrity in Cache Memories
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
Seongwoo Kim, Arun K. Somani
ISQED
2003
IEEE
113views Hardware» more  ISQED 2003»
14 years 2 months ago
Using Integer Equations for High Level Formal Verification Property Checking
This paper describes the use of integer equations for high level modeling digital circuits for application of formal verification properties at this level. Most formal verificatio...
Bijan Alizadeh, Mohammad Reza Kakoee
IPPS
2003
IEEE
14 years 2 months ago
So Many States, So Little Time: Verifying Memory Coherence in the Cray X1
This paper investigates a complexity-effective technique for verifying a highly distributed directory-based cache coherence protocol. We develop a novel approach called “witnes...
Dennis Abts, Steve Scott, David J. Lilja
AMAST
2004
Springer
14 years 2 months ago
On Guard: Producing Run-Time Checks from Integrity Constraints
Abstract. Software applications are inevitably concerned with data integrity, whether the data is stored in a database, files, or program memory. An integrity guard is code execut...
Michael Benedikt, Glenn Bruns
TCCI
2010
13 years 7 months ago
A Cross-Cultural Multi-agent Model of Opportunism in Trade
According to transaction cost economics, contracts are always incomplete and offer opportunities to defect. Some level of trust is a sine qua non for trade. If the seller is better...
Gert Jan Hofstede, Catholijn M. Jonker, Tim Verwaa...