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» Model checking with Boolean Satisfiability
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VMCAI
2009
Springer
14 years 3 months ago
Extending Symmetry Reduction by Exploiting System Architecture
Abstract. Symmetry reduction is a technique to alleviate state explosion in model checking by replacing a model of replicated processes with a bisimilar quotient model. The size of...
Richard J. Trefler, Thomas Wahl
KBSE
2008
IEEE
14 years 3 months ago
The Consistency of Web Conversations
Abstract—We describe BPELCheck, a tool for statically analyzing interactions of composite web services implemented in BPEL. Our algorithm is compositional, and checks each proces...
Jeffrey Fischer, Rupak Majumdar, Francesco Sorrent...
CAV
1994
Springer
113views Hardware» more  CAV 1994»
14 years 26 days ago
A Determinizable Class of Timed Automata
We introduce event-recording automata. An event-recording automaton is a timed automaton that contains, for every event a, a clock that records the time of the last occurrence of a...
Rajeev Alur, Limor Fix, Thomas A. Henzinger
BIRTHDAY
2009
Springer
14 years 3 months ago
Nonassociative Lambek Calculus with Additives and Context-Free Languages
We study Nonassociative Lambek Calculus with additives ∧, ∨, satisfying the distributive law (Distributive Full Nonassociative Lambek Calculus DFNL). We prove that categorial g...
Wojciech Buszkowski, Maciej Farulewski
CCECE
2006
IEEE
14 years 2 months ago
FPGA-Based SAT Solver
Several approaches have been proposed to accelerate the NP-complete Boolean Satisfiability problem (SAT) using reconfigurable computing. We present an FPGA based clause evaluator,...
Mona Safar, M. Watheq El-Kharashi, Ashraf Salem