356 search results - page 22 / 72 » Modeling Cache Sharing on Chip Multiprocessor Architectures |
HOTI
2008
IEEE
14 years 3 months ago
2008
IEEE
Much of high performance technical computing has moved from shared memory architectures to message based cluster systems. The development and wide adoption of the MPI parallel pro...
EUROPAR
2005
Springer
14 years 2 months ago
2005
Springer
There are two important hurdles that restrict the scalability of directory-based shared-memory multiprocessors: the directory memory overhead and the long L2 miss latencies due to ...
SIGARCH
2008
13 years 8 months ago
2008
- Bioinformatics applications such as gene and protein sequence matching algorithms are characterized by the need to process large amounts of data. While uni-processor performance ...
HICSS
1999
IEEE
14 years 27 days ago
1999
IEEE
Distributed Shared Memory (DSM) combines the scalability of loosely coupled multicomputer systems with the ease of usability of tightly coupled multiprocessors, and allows transpa...
CASES
2001
ACM
14 years 8 days ago
2001
ACM
Intertask/interprocess synchronization overheads may be significant in a multiprocessor-shared memory System-on-a-Chip implementation. These overheads are observed in terms of loc...