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» Modeling GPU-CPU workloads and systems
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CN
2002
112views more  CN 2002»
13 years 9 months ago
State-dependent M/G/1 type queueing analysis for congestion control in data networks
Abstract--We study in this paper a TCP-like linear-increase multiplicative-decrease flow control mechanism. We consider congestion signals that arrive in batches according to a Poi...
Eitan Altman, Konstantin Avrachenkov, Chadi Baraka...
OOPSLA
2010
Springer
13 years 8 months ago
Hera-JVM: a runtime system for heterogeneous multi-core architectures
Heterogeneous multi-core processors, such as the IBM Cell processor, can deliver high performance. However, these processors are notoriously difficult to program: different cores...
Ross McIlroy, Joe Sventek
DSD
2002
IEEE
146views Hardware» more  DSD 2002»
14 years 2 months ago
Configurable Memory Organisation for Communication Applications
A configurable memory organisation for the execution of Hiperlan/2 transceiver baseband processing and MPEG2 decoding is presented. The configuration of the memory system is done ...
Juha-Pekka Soininen, Antti Pelkonen, Jussi Roivain...
ICS
2005
Tsinghua U.
14 years 3 months ago
Improved automatic testcase synthesis for performance model validation
Performance simulation tools must be validated during the design process as functional models and early hardware are developed, so that designers can be sure of the performance of...
Robert H. Bell Jr., Lizy Kurian John
IDEAS
2003
IEEE
117views Database» more  IDEAS 2003»
14 years 3 months ago
A Multi-Resolution Block Storage Model for Database Design
We propose a new storage model called MBSM (Multiresolution Block Storage Model) for laying out tables on disks. MBSM is intended to speed up operations such as scans that are typ...
Jingren Zhou, Kenneth A. Ross