32 search results - page 4 / 7 » Modeling Multiprocessor Cache Protocol Impact on MPI Perform... |
ICPP
2009
IEEE
13 years 7 months ago
2009
IEEE
This paper evaluates several techniques to save leakage in CMP L2 caches by selectively switching off the less used lines. We primarily focus on private snoopy L2 caches. In this c...
MOBIHOC
2003
ACM
14 years 9 months ago
2003
ACM
We develop a detailed approach to study how mobilityimpacts the performance of reactive MANET routing protocols. In particular we examine how the statistics of path durations inclu...
IPPS
2005
IEEE
14 years 3 months ago
2005
IEEE
The need to provide performance guarantee in high performance servers has long been neglected. Providing performance guarantee in current and future servers is difficult because ï...
HPCA
2011
IEEE
13 years 1 months ago
2011
IEEE
Future CMPs will combine many simple cores with deep cache hierarchies. With more cores, cache resources per core are fewer, and must be shared carefully to avoid poor utilization...
SIGOPS
2010
13 years 4 months ago
2010
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...