1031 search results - page 83 / 207 » Modeling and Formal Verification of Production Automation Sy... |
ESORICS
2009
Springer
14 years 8 months ago
2009
Springer
We present a formal model for stateful security protocols. This model is used to define ownership and ownership transfer as concepts as well as security properties. These definitio...
APSEC
2008
IEEE
13 years 9 months ago
2008
IEEE
Formal verification of Function Block Diagram (FBD) based software is an essential task when replacing traditional relay-based analog system with PLC-based software in nuclear rea...
SEKE
2005
Springer
14 years 1 months ago
2005
Springer
The paper presents an approach to support run-time verification of software systems that combines two existing tools, Prospec and Java-MaC, into a single framework. Prospec can be...
MEMOCODE
2010
IEEE
13 years 5 months ago
2010
IEEE
Electronic System Level (ESL) design manages the complexity of todays systems by using abstract models. In this context Transaction Level Modeling (TLM) is state-of-theart for desc...
ISOLA
2010
Springer
13 years 5 months ago
2010
Springer
We give a detailed construction of a finite-state transition system for a com-connected Message Sequence Graph. Though this result is fairly well-known in the literature there has...