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FPGA
2003
ACM
161views FPGA» more  FPGA 2003»
15 years 11 months ago
Implementation of BEE: a real-time large-scale hardware emulation engine
This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ...
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, R...
VISUALIZATION
2002
IEEE
15 years 11 months ago
Oriented Tensor Reconstruction: Tracing Neural Pathways from Diffusion Tensor MRI
In this paper we develop a new technique for tracing anatomical fibers from 3D tensor fields. The technique extracts salient tensor features using a local regularization techniq...
Leonid Zhukov, Alan H. Barr
DATE
2002
IEEE
101views Hardware» more  DATE 2002»
15 years 11 months ago
Systematic Design of a 200 Ms/S 8-bit Interpolating A/D Converter
The systematic design of a high-speed, high-accuracy Nyquist A/D converter is proposed. The presented design methodology covers the complete flow and is supported by software tool...
Jan Vandenbussche, Erik Lauwers, K. Uyttenhove, Mi...
CHI
2009
ACM
16 years 6 months ago
Spectator understanding of error in performance
The development of computer-based devices for music control has created a need to study how spectators understand new performance technologies and practices. As a part of a larger...
A. Cavan Fyans, Michael Gurevich, Paul Stapleton
ICIP
2008
IEEE
16 years 14 days ago
Using region semantics and visual context for scene classification
In this paper we focus on scene classification and detection of high-level concepts within multimedia documents, by introducing an intermediate contextual approach as a means of ...
Evaggelos Spyrou, Phivos Mylonas, Yannis S. Avrith...