805 search results - page 32 / 161 » Modeling the performance of algorithms on flash memory devic... |
138
Voted
IPPS
1999
IEEE
15 years 8 months ago
1999
IEEE
Parallel programming models should attempt to satisfy two conflicting goals. On one hand, they should hide architectural details so that algorithm designers can write simple, port...
117
Voted
SC
2004
ACM
15 years 9 months ago
2004
ACM
The Merrimac supercomputer uses stream processors and a highradix network to achieve high performance at low cost and low power. The stream architecture matches the capabilities o...
108
Voted
PATMOS
2005
Springer
15 years 9 months ago
2005
Springer
Abstract. Embedded devices designed for various real-time multimedia and telecom applications, have a bottleneck in energy consumption and performance that becomes day by day more ...
218
Voted
STOC
1993
ACM
15 years 7 months ago
1993
ACM
Most complexity measures for concurrent algorithms for asynchronous shared-memory architectures focus on process steps and memory consumption. In practice, however, performance of ...
109
Voted
CLUSTER
2002
IEEE
15 years 8 months ago
2002
IEEE
In modern clustering environments where the memory hierarchy has many layers (distributed memory, shared memory layer, cache, ¡ ¢ ), an important question is how to fully u...