805 search results - page 63 / 161 » Modeling the performance of algorithms on flash memory devic... |
MICRO
2010
IEEE
13 years 3 months ago
2010
IEEE
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
HIPEAC
2005
Springer
14 years 2 months ago
2005
Springer
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
ICPP
2007
IEEE
14 years 3 months ago
2007
IEEE
The real-time image forming in future, high-end synthetic aperture radar systems is an example of an application that puts new demands on computer architectures. The initial quest...
CODES
2000
IEEE
14 years 1 months ago
2000
IEEE
This paper discusses the trade-off between calculations and memory accesses in a 3D graphics tile renderer for visualization of data from medical scanners. The performance require...
SPAA
2010
ACM
14 years 1 months ago
2010
ACM
Transactional Memory (TM) is a promising technique that simplifies parallel programming for shared-memory applications. To date, most TM systems have been designed to efficientl...