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» Modeling transactional memory workload performance
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SIGMETRICS
1996
ACM
174views Hardware» more  SIGMETRICS 1996»
13 years 11 months ago
Embra: Fast and Flexible Machine Simulation
This paper describes Embra, a simulator for the processors, caches, and memory systems of uniprocessors and cache-coherent multiprocessors. When running as part of the SimOS simul...
Emmett Witchel, Mendel Rosenblum
CIKM
1994
Springer
13 years 11 months ago
TID Hash Joins
TID hash joins are a simple and memory-efficient method for processing large join queries. They are based on standard hash join algorithms but only store TID/key pairs in the hash...
Robert Marek, Erhard Rahm
PPOPP
2006
ACM
14 years 1 months ago
A case study in top-down performance estimation for a large-scale parallel application
This work presents a general methodology for estimating the performance of an HPC workload when running on a future hardware architecture. Further, it demonstrates the methodology...
Ilya Sharapov, Robert Kroeger, Guy Delamarter, Raz...
PODC
2005
ACM
14 years 1 months ago
Toward a theory of transactional contention managers
In recent software transactional memory proposals, a contention manager module is responsible for ensuring that the system as a whole makes progress. A number of contention manage...
Rachid Guerraoui, Maurice Herlihy, Bastian Pochon
POPL
2009
ACM
14 years 8 months ago
Feedback-directed barrier optimization in a strongly isolated STM
Speed improvements in today's processors have largely been delivered in the form of multiple cores, increasing the importance of ions that ease parallel programming. Software...
Nathan Grasso Bronson, Christos Kozyrakis, Kunle O...