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IEEEPACT
2009
IEEE
13 years 6 months ago
Cache Sharing Management for Performance Fairness in Chip Multiprocessors
Resource sharing can cause unfair and unpredictable performance of concurrently executing applications in Chip-Multiprocessors (CMP). The shared last-level cache is one of the mos...
Xing Zhou, Wenguang Chen, Weimin Zheng
IPPS
2010
IEEE
13 years 6 months ago
Runtime checking of serializability in software transactional memory
Abstract--Ensuring the correctness of complex implementations of software transactional memory (STM) is a daunting task. Attempts have been made to formally verify STMs, but these ...
Arnab Sinha, Sharad Malik
EUROCRYPT
2008
Springer
13 years 10 months ago
New Constructions for UC Secure Computation Using Tamper-Proof Hardware
The Universal Composability framework was introduced by Canetti to study the security of protocols which are concurrently executed with other protocols in a network environment. U...
Nishanth Chandran, Vipul Goyal, Amit Sahai
VLSID
2008
IEEE
128views VLSI» more  VLSID 2008»
14 years 9 months ago
Addressing the Challenges of Synchronization/Communication and Debugging Support in Hardware/Software Cosimulation
With increasing adoption of Electronic System Level (ESL) tools, effective design and validation time has reduced to a considerable extent. Cosimulation is found to be a principal...
Banit Agrawal, Timothy Sherwood, Chulho Shin, Simo...
ADAEUROPE
2001
Springer
14 years 1 months ago
Transaction Support for Ada
This paper describes the transaction support framework OPTIMA and its implementation for Ada 95. First, a transaction model that fits concurrent programming languages is presented...
Jörg Kienzle, Ricardo Jiménez-Peris, A...