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CJ
2006
84views more  CJ 2006»
13 years 8 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
BC
1998
98views more  BC 1998»
13 years 8 months ago
The dynamics of long-term exploration in the rat
A simple analytical model is proposed here that captures to a large extent the kinematic structure of rat exploratory behavior. Previous studies have shown that such behavior consi...
Ofer Tchernichovski, Yoav Benjamini, Ilan Golani
PDP
2010
IEEE
14 years 3 months ago
The Design and Implementation of the SWIM Integrated Plasma Simulator
Abstract—As computing capabilities have increased, the coupling of computational models has become an increasingly viable and therefore important way of improving the physical ï¬...
Wael R. Elwasif, David E. Bernholdt, Aniruddha G. ...
ACISP
2009
Springer
14 years 3 months ago
Towards Denial-of-Service-Resilient Key Agreement Protocols
Denial of service resilience is an important practical consideration for key agreement protocols in any hostile environment such as the Internet. There are well-known models that ...
Douglas Stebila, Berkant Ustaoglu
PPDP
2005
Springer
14 years 2 months ago
ReactiveML: a reactive extension to ML
We present ReactiveML, a programming language dedicated to the implementation of complex reactive systems as found in graphical user interfaces, video games or simulation problems...
Louis Mandel, Marc Pouzet