Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
Existing work on menu techniques has shown linear menus to be less efficient and reliable for menuing tasks when compared to radial menus. With the rise in popularity of 3D spatia...
Dustin B. Chertoff, Ross W. Byers, Joseph J. LaVio...
We propose a more efficient privacy preserving set intersection protocol which improves the previously known result by a factor of O(N) in both the computation and communication c...
Software-controlled scratchpad memory is increasingly employed in embedded systems as it offers better timing predictability compared to caches. Previous scratchpad allocation alg...
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...