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» Models of Computation for Networks on Chip
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CAL
2007
13 years 9 months ago
Logic-Based Distributed Routing for NoCs
—The design of scalable and reliable interconnection networks for multicore chips (NoCs) introduces new design constraints like power consumption, area, and ultra low latencies. ...
José Flich, José Duato
SPIN
2004
Springer
14 years 2 months ago
Model Checking Genetic Regulatory Networks Using GNA and CADP
Grégory Batt, Damien Bergamini, Hidde de Jo...
SC
1992
ACM
14 years 1 months ago
An Algebraic Theory for Modeling Direct Interconnection Networks
S. D. Kaushik, Sanjay Sharma, Chua-Huang Huang, Je...