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» Models of Computation for Networks on Chip
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IPPS
2007
IEEE
14 years 3 months ago
QUKU: A FPGA Based Flexible Coarse Grain Architecture Design Paradigm using Process Networks
DSP applications can be suitably represented using Process Network Models. This paper uses a modification of Kahn Process Network to solve the problem of finding an optimum arch...
Sunil Shukla, Neil W. Bergmann, Jürgen Becker
ICDCS
1996
IEEE
14 years 1 months ago
Supporting a Flexible Parallel Programming Model on a Network of Workstations
We introduce a shared memory software prototype system for executing programs with nested parallelism on a network of workstations. This programming model exhibits a very convenie...
Shih-Chen Huang, Zvi M. Kedem
AINA
2008
IEEE
14 years 3 months ago
A New Service Level Agreement Model for Best-Effort Traffics in IP over WDM
In this paper, we propose a new SLA model for best effort IP traffic over WDM networks. This model jointly considers two QoS metrics, workable traffic volume and availability, as ...
Hung-Yi Chang, Pi-Chung Wang, Chia-Tai Chan, Chun-...
CMOT
2000
123views more  CMOT 2000»
13 years 9 months ago
Nonadditive Shortest Paths: Subproblems in Multi-Agent Competitive Network Models
A variety of different multi-agent (competitive) network models have been described in the literature. Computational techniques for solving such models often involve the iterative...
Steven A. Gabriel, David Bernstein
ICPP
1999
IEEE
14 years 1 months ago
New Delay Analysis in High Speed Networks
The implementation of bounded-delay services over integrated services networks relies admission control mechanisms that in turn use end-to-end delay computation algorithms. For gu...
Chengzhi Li, Riccardo Bettati, Wei Zhao