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» Models of Computation for Networks on Chip
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DAC
2000
ACM
14 years 1 months ago
Fast power grid simulation
The decrease in feature size and added chip functionality in large sub-micron integrated circuits demand larger grids for power distribution. Since power grids are performance lim...
Sani R. Nassif, Joseph N. Kozhaya
MICRO
1998
IEEE
129views Hardware» more  MICRO 1998»
14 years 1 months ago
A Bandwidth-efficient Architecture for Media Processing
Media applications are characterized by large amounts of available parallelism, little data reuse, and a high computation to memory access ratio. While these characteristics are p...
Scott Rixner, William J. Dally, Ujval J. Kapasi, B...
CF
2008
ACM
13 years 11 months ago
Fpga-based prototype of a pram-on-chip processor
PRAM (Parallel Random Access Model) has been widely regarded a desirable parallel machine model for many years, but it is also believed to be "impossible in reality." As...
Xingzhi Wen, Uzi Vishkin
DSN
2005
IEEE
13 years 11 months ago
A Spatial Fluid-Based Framework to Analyze Large-Scale Wireless Sensor Networks
The behavior of large-scale wireless sensor networks has been shown to be surprisingly complex and difficult to analyze, both by empirical experiment and simulation. In this pape...
Marco Gribaudo, Carla-Fabiana Chiasserini, Rossano...
MOBIHOC
2006
ACM
14 years 9 months ago
Analysis of random mobility models with PDE's
In this paper we revisit two classes of mobility models which are widely used to represent users' mobility in wireless networks: Random Waypoint (RWP) and Random Direction (R...
Michele Garetto, Emilio Leonardi