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FPL
2009
Springer
132views Hardware» more  FPL 2009»
15 years 8 months ago
Binary Synthesis with multiple memory banks targeting array references
High-Level Synthesis (HLS) is the field of transforming a high-level programming language, such as C, into a register transfer level(RTL) description of the design. In HLS, Binary...
Yosi Ben-Asher, Nadav Rotem
ASAP
2004
IEEE
123views Hardware» more  ASAP 2004»
15 years 8 months ago
A Packet Scheduling Algorithm for IPSec Multi-Accelerator Based Systems
IPSec is a suite of protocols that adds security to communications at the IP level. Protocols within the IPSec suite make extensive use of cryptographic algorithms. Since these al...
Fabien Castanier, Alberto Ferrante, Vincenzo Piuri
BSN
2006
IEEE
15 years 8 months ago
eWatch: A Wearable Sensor and Notification Platform
The eWatch is a wearable sensing, notification, and computing platform built into a wrist watch form factor making it highly available, instantly viewable, ideally located for sen...
Uwe Maurer, Anthony Rowe, Asim Smailagic, Daniel P...
EDOC
2004
IEEE
15 years 8 months ago
Mapping EDOC to Web Services using YATL
Modeling is a technique used extensively in industry to define software systems, the UML being the most prominent example. With the increased use of modeling techniques has come t...
Octavian Patrascoiu
EUC
2004
Springer
15 years 8 months ago
Hardware Mediators: A Portability Artifact for Component-Based Systems
Abstract. In this article we elaborate on portability in componentbased operating systems, focusing in the hardware mediator construct proposed by Frhlich in the Application-Orient...
Fauze Valério Polpeta, Antônio August...