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ICPP
2002
IEEE
14 years 18 days ago
Optimal Code Size Reduction for Software-Pipelined Loops on DSP Applications
Code size expansion of software-pipelined loops is a critical problem for DSP systems with strict code size constraint. Some ad-hoc code size reduction techniques were used to try...
Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha
INFOCOM
2002
IEEE
14 years 18 days ago
Ultrafast Photonic Label Switch for Asynchronous Packets of Variable Length
- This paper describes new optical switching architectures supporting asynchronous variable-length packets. Output line contention is resolved by optical delay line buffers. By int...
Masayuki Murata, Ken-ichi Kitayama
EMSOFT
2006
Springer
13 years 11 months ago
Scheduling-independent threads and exceptions in SHIM
Concurrent programming languages should be a good fit for embedded systems because they match the intrinsic parallelism of their architectures and environments. Unfortunately, typ...
Olivier Tardieu, Stephen A. Edwards
VLDB
1991
ACM
185views Database» more  VLDB 1991»
13 years 11 months ago
Experimental Evaluation of Real-Time Optimistic Concurrency Control Schemes
Due to its potential for a high degree of parallelism, optimistic concurrency control is expected to perform better than two-phase locking when integrated with priority-driven CPU...
Jiandong Huang, John A. Stankovic, Krithi Ramamrit...
DAC
2005
ACM
13 years 9 months ago
Unified high-level synthesis and module placement for defect-tolerant microfluidic biochips
Microfluidic biochips promise to revolutionize biosensing and clinical diagnostics. As more bioassays are executed concurrently on a biochip, system integration and design complex...
Fei Su, Krishnendu Chakrabarty