106 search results - page 11 / 22 » Multiple Branch and Block Prediction |
ACMMSP
2004
ACM
14 years 1 months ago
2004
ACM
As superscalar processors become increasingly wide, it is inevitable that the large set of instructions to be fetched every cycle will span multiple noncontiguous basic blocks. Th...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
Wide Single Instruction, Multiple Thread (SIMT) architectures often require a static allocation of thread groups that are executed in lockstep throughout the entire application ker...
ICIP
2010
IEEE
13 years 5 months ago
2010
IEEE
Adaptive Intra Mode Bit Skip (AIMBS) technique using boundary pixels smoothness has been shown to achieve coding efficiency improvement for H.264/AVC's Intra_4x4 coding in re...
ICS
1999
Tsinghua U.
13 years 11 months ago
1999
Tsinghua U.
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
NIPS
2008
13 years 9 months ago
2008
For supervised and unsupervised learning, positive definite kernels allow to use large and potentially infinite dimensional feature spaces with a computational cost that only depe...