377 search results - page 24 / 76 » Multiple Instruction Stream Processor |
PAIRING
2007
Springer
14 years 1 months ago
2007
Springer
A series of recent algorithmic advances has delivered highly effective methods for pairing evaluation and parameter generation. However, the resulting multitude of options means m...
RTSS
2008
IEEE
14 years 2 months ago
2008
IEEE
With the advent of increasingly complex hardware in realtime embedded systems (processors with performance enhancing features such as pipelines, cache hierarchy, multiple cores), ...
CHES
2008
Springer
13 years 9 months ago
2008
Springer
Bit-slicing is a non-conventional implementation technique for cryptographic software where an n-bit processor is considered as a collection of n 1-bit execution units operating in...
ASC
2004
13 years 7 months ago
2004
Abstract. This paper presents a real-time full-programmable fuzzy compiler based on piecewise linear interpolation techniques designed to be executed in SIMD (Single Instruction Mu...
ICPP
1999
IEEE
13 years 12 months ago
1999
IEEE
This paper describes the challenges presented by singlechip parallel media processors (PMPs). These machines integrate multiple parallel function units, instruction execution, and...