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EUROPAR
1998
Springer
13 years 12 months ago
A Lower Bound for Dynamic Scheduling of Data Parallel Programs
Instruction Balanced Time Slicing IBTS allows multiple parallel jobs to be scheduled in a manner akin to the well-known gang scheduling scheme in parallel computers. IBTS however a...
Fabrício Alves Barbosa da Silva, Luis Migue...
ARCS
2006
Springer
13 years 11 months ago
Do Trace Cache, Value Prediction and Prefetching Improve SMT Throughput?
While trace cache, value prediction, and prefetching have been shown to be effective in the single-threaded superscalar, there has been no analysis of these techniques in a Simulta...
Chen-Yong Cher, Il Park, T. N. Vijaykumar
WIESS
2000
13 years 9 months ago
HP Caliper: An Architecture for Performance Analysis Tools
HP Caliper is an architecture for software developer tools that deal with executable (binary) programs. It provides a common framework that allows building of a wide variety of to...
Robert Hundt
JEI
2000
133views more  JEI 2000»
13 years 7 months ago
Low complexity block motion estimation using morphological-based feature extraction and XOR operations
Motion estimation is a temporal image compression technique, where an n x n block of pixels in the current frame of a video sequence is represented by a motion vector with respect...
Thinh M. Le, R. Mason, Sethuraman Panchanathan
ASIAN
2006
Springer
118views Algorithms» more  ASIAN 2006»
13 years 11 months ago
An Approach to Formal Verification of Arithmetic Functions in Assembly
Abstract. It is customary to write performance-critical parts of arithmetic functions in assembly: this enables finely-tuned algorithms that use specialized processor instructions....
Reynald Affeldt, Nicolas Marti