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ICS
1999
Tsinghua U.
13 years 12 months ago
1999
Tsinghua U.
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
ICS
2009
Tsinghua U.
14 years 2 months ago
2009
Tsinghua U.
With the current trend toward multicore architectures, improved execution performance can no longer be obtained via traditional single-thread instruction level parallelism (ILP), ...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
We present a study of multithreaded implementations of Thorup’s algorithm for solving the Single Source Shortest Path (SSSP) problem for undirected graphs. Our implementations l...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
There are two popular parallel programming paradigms available to high performance computing users such as engineering and physics professionals: message passing and distributed s...
SBACPAD
2007
IEEE
14 years 1 months ago
2007
IEEE
One way to exploit Thread Level Parallelism (TLP) is to use architectures that implement novel multithreaded execution models, like Scheduled DataFlow (SDF). This latter model pro...