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SIGCOMM
2010
ACM
13 years 7 months ago
PacketShader: a GPU-accelerated software router
We present PacketShader, a high-performance software router framework for general packet processing with Graphics Processing Unit (GPU) acceleration. PacketShader exploits the mas...
Sangjin Han, Keon Jang, KyoungSoo Park, Sue B. Moo...
FPL
2009
Springer
172views Hardware» more  FPL 2009»
14 years 8 days ago
Performance comparison of single-precision SPICE Model-Evaluation on FPGA, GPU, Cell, and multi-core processors
Automated code generation and performance tuning techniques for concurrent architectures such as GPUs, Cell and FPGAs can provide integer factor speedups over multi-core processor...
Nachiket Kapre, André DeHon
EUROGRAPHICS
2010
Eurographics
14 years 3 months ago
Fast Ray Sorting and Breadth-First Packet Traversal for GPU Ray Tracing
We present a novel approach to ray tracing execution on commodity graphics hardware using CUDA. We decompose a standard ray tracing algorithm into several data-parallel stages tha...
Kirill Garanzha and Charles Loop
SBACPAD
2008
IEEE
206views Hardware» more  SBACPAD 2008»
14 years 2 months ago
A High Performance Massively Parallel Approach for Real Time Deformable Body Physics Simulation
Single processor technology has been evolving across last decades, but due to physical limitations of chip manufacturing process, the industry is pursuing alternatives to sustain ...
Thiago S. M. C. de Farias, Mozart W. S. Almeida, J...
CLUSTER
2009
IEEE
13 years 5 months ago
MITHRA: Multiple data independent tasks on a heterogeneous resource architecture
With the advent of high-performance COTS clusters, there is a need for a simple, scalable and faulttolerant parallel programming and execution paradigm. In this paper, we show that...
Reza Farivar, Abhishek Verma, Ellick Chan, Roy H. ...