d Abstract] Christoph Lenzen Computer Engineering and Networks Laboratory (TIK) ETH Zurich, 8092 Zurich, Switzerland lenzen@tik.ee.ethz.ch Thomas Locher Computer Engineering and N...
Christoph Lenzen, Thomas Locher, Roger Wattenhofer
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
In this paper, we propose a novel clock calibration approach called FLIGHT, which leverages the fact that the fluorescent light intensity changes with a stable period that equals...
Zhenjiang Li, Wenwei Chen, Cheng Li, Mo Li, Xiang-...
Abstract—This paper presents a preamble-based low complexity synchronization method for MB-OFDM based UWB systems. The proposed synchronization method consists of sync detection,...
Trent Jacobs, Yinghui Li, Hlaing Minn, R. M. A. P....
Time-driven Key Sequencing (TKS) is a key management technique that synchronizes the session key used by a set of communicating principals based on time of day. This relatively lo...
Geoffrey G. Xie, Cynthia E. Irvine, Timothy E. Lev...